The present invention relates generally to dielectrically isolated integrated circuits, and more specifically, to an improved contact for the buried layer in dielectrically isolated integrated circuits.
In standard dielectric isolation processing, a buried N.sup.+ layer is often added by nonselectively or selectively introducing impurities into the surface of a single crystal substrate which is then moat etched to define the islands and later covered with a dielectric layer and support material. Once the other side of the substrate is removed to expose single crystal islands embedded in the support material, devices are formed within the dielectrically isolated substrate islands. To provide a low resistive path to the buried layer, impurities must be diffused from the now front-side surface down into the buried layer. Because this diffusion is a deep diffusion requiring a long period of time, the buried layer will substantially up-diffuse during this diffusion. For most circuits, this does not produce any undesirable side effects. However, with the trend in the state of the art to use very thin dielectrically isolated islands, the up-diffusion of the buried region substantially affects the breakdown voltage of the device. Thus, it has been suggested to form the thin dielectric isolated islands without the buried layer. This substantially increases the collector resistance and may be undesirable for some circuit elements, particularly output devices which are required to drive or sink large currents.
One solution to this problem is to form low resistive regions along the side walls of the tub extending up from the buried layer. Typical examples are shown in U.S. Pat. Nos. 3,858,237; 3,938,176 and 4,146,905. Since the side walls are formed generally at the same time as the buried layer, the diffusion is lateral to the surface, and consequently does not require an extensive diffusion cycle time. Since the base diffusion must be kept a minimum distance of about 6 microns from the buried layer and the side wall low resistive path, the size of each of the dielectrically isolated regions must be increased in all directions. Although this solution provides a low resistive path to the buried region, it also adds several microns to each side of each island. This would render this approach inappropriate for use in high density circuits, for example dielectrically isolated RAMS.
Thus, there exists a need for forming low resistive paths to buried collector regions which may be used in high density circuits without diffusing down from the front surface.